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Si570/Si571
Register 135. Reset/Freeze/Memory Control
Bit
Name
Type
D7
RST_REG
R/W
D6
NewFreq
R/W
D5
Freeze M
R/W
D4
Freeze VCADC
R/W
D3
D2
N/A
R/W
D1
D0
RECALL
R/W
Reset settings = 00xx xx00
Bit
7
6
5
4
3:1
0
Name
RST_REG
NewFreq
Freeze M
Freeze
VCADC
N/A
RECALL
Function
Internal Reset.
0 = Normal operation.
1 = Reset of all internal logic. Output tristated during reset.
Upon completion of internal logic reset, RST_REG is internally reset to zero.
Note: Asserting RST_REG will interrupt the I 2 C state machine. It is not the recommended
approach for starting from initial conditions.
New Frequency Applied.
Alerts the DSPLL that a new frequency configuration has been applied. This bit will
clear itself when the new frequency is applied.
Freezes the M Control Word.
Prevents interim frequency changes when writing RFREQ registers.
Freezes the VC ADC Output Word.
May be used to hold the nominal output frequency of an Si571.
Always Zero.
Recall NVM into RAM.
0 = No operation.
1 = Write NVM bits into RAM. Bit is internally reset following completion of operation.
Note: Asserting RECALL reloads the NVM contents in to the operating registers without
interrupting the I 2 C state machine. It is the recommended approach for starting from
initial conditions.
Register 137. Freeze DCO
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
Type
Reset settings = 00xx xx00
Freeze
DCO
R/W
Bit
7:5
4
Name
Reserved
Freeze DCO
Function
Freeze DCO.
Freezes the DSPLL so the frequency configuration can be modified.
24
3:0
Reserved
Rev. 1.4
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